<会議発表論文>
TMR based Error Correction Method Considering Trade-off between Area and Soft-Error Tolerance

作成者
本文言語
出版者
発行日
収録物名
開始ページ
終了ページ
出版タイプ
アクセス権
概要 Recently, the lowering of soft error tolerance of LSI becomes the problem. Soft error is a phenomenon that the output value of a logic gate flips transiently or the preserved value of a storage elemen...t flips because of neutron particle strike etc. This paper presents a TMR based error correction method considering trade-off between soft error tolerance and area overhead. Our method corrects an error which occurs in a logic circuit when specific input vectors are given to the circuit. In our method, the degree of loss of soft error tolerance that can be allowed in target circuit is given as a design constraint. The method aims at selecting input vectors which contribute to area minimization of correction circuits under the constraint as unprotected vectors. This paper shows vector selection method for minimizing the area. For results, there are several circuits that it is cost-effective. It seems that there is validity in our approach.続きを見る

本文情報を非表示

s_harada10_1 pdf 193 KB 184  

詳細

レコードID
査読有無
関連情報
登録日 2010.10.01
更新日 2020.11.27

この資料を見た人はこんな資料も見ています