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In this paper, we propose an adaptive extensible processor in which custom instructions are generated and added after chip-fabrication. A reconfigurable functional unit is utilized to support this fea...ture. The proposed reconfigurable functional unit is based on a matrix of functional units which is multi-cycle with the capability of conditional execution. A quantitative approach is utilized to fix the constraints of the architecture. Unlike previously proposed custom instructions, ours include multiple exits. Conditional execution has been added to support the multi-exit feature of custom instructions. Experimental results show that multi-exit custom instructions enhance the performance by an average of 46% compared to custom instructions limited to one basic block. A maximum speedup of 2.89, compared to a 4-issue in-order RISC processor, and an average speedup of 1.66 was achieved on MiBench benchmark suite.続きを見る
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