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Recently, the lowering of soft error tolerance of LSI becomes the problem. Soft error is a phenomenon that the output value of a logic gate flips transiently or the preserved value of a storage elemen...t flips because of neutron particle strike etc. This paper presents a TMR based error correction method considering trade-off between soft error tolerance and area overhead. Our method corrects an error which occurs in a logic circuit when specific input vectors are given to the circuit. In our method, the degree of loss of soft error tolerance that can be allowed in target circuit is given as a design constraint. The method aims at selecting input vectors which contribute to area minimization of correction circuits under the constraint as unprotected vectors. This paper shows vector selection method for minimizing the area. For results, there are several circuits that it is cost-effective. It seems that there is validity in our approach.続きを見る
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Mendeley出力
s_harada10_1