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This paper discusses the impact of the use of high functionality IP cores on software development for a system designed with Functional Redundancy. Functional Redundancy is a novel approach for system... design which aims at shortening TAT (Turn Around Time) for SoC designs and allowing dynamic exchange of system’s characteristics of power consumption and performance. It is based on having different implementation instances of circuits with same functionality, but with different performance-energy consumption characteristics, in the same chip. An RTOS aware of the functional redundancy present in the circuit will make the dispatch of instructions to the highest performance or to the lowest power consuming IP core, according to the system load, thus, obtaining minimum power consumption while meeting performance requirements. Problems related with IP cores’ level of functionality and its applicability to Functional Redundancy design approach are also discussed.続きを見る
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