| 作成者 |
|
|
|
|
|
|
|
|
|
| 本文言語 |
|
| 発行日 |
|
| 収録物名 |
|
| 収録物名 |
|
| 出版タイプ |
|
| アクセス権 |
|
| 関連DOI |
|
|
|
|
|
| 関連URI |
|
|
|
|
|
| 関連情報 |
|
|
|
|
|
| 概要 |
"PPRAM" (Parallel Processing Random Access Memory) is a novel architectural framework for ASSPs and integrates the following onto a single SOC, memory (DRAM or others), logic (MPU or application-speci...fic logic), and network interface based on "PPRAM-Link" standard. The PPRAM-Link provides a high-bandwidth interface needed for communicating among two or more PPRAM nodes, which is composed of physical/logical layers and an API for the software development, these are standardized at PPRAM Consortium, based on SCI. This paper describes the PPRAM-Link standard. As the physical layer standard, two Clock and Data Recovery (CDR) processing method are proposed. And then, the referential implementations, PPRAM-based system for "ab initio" MO calculations :"MOE", and PPRAM-Link I/F IP Core, are also described. Lastly, a prospect of coming step of PPRAM-Link is described.続きを見る
|
Mendeley出力
Hashimoto1