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Razor flip-flop (FF) is a clever technique to eliminate the supply voltage margin by exploiting circuit-level timing speculation. It combines dynamic voltage scaling technique with the error detection... and recovery mechanism. This paper presents an improvement of Razor FF in removing delayed clock, which complicates timing design. It is named canary FF. This paper discusses critical issues regarding the canary FF. When the issues were solved, the canary FF would achieve 10% of power reduction by exploiting input value variations.続きを見る
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