An Accelerated Datapath Width Optimization Technique for Area Reduction of Embedded Systems - Collections | Kyushu University Library

＜conference paper＞
An Accelerated Datapath Width Optimization Technique for Area Reduction of Embedded Systems

Creator	Creator Name Mesbah, Uddin M. メスバ, ウッデンM Affiliation Affiliation Name Department of Computer Science and Communication Engineering, Kyushu University
	Creator Name Cao, Yun 曹, ユンソウ, ユン Affiliation Affiliation Name Department of Computer Science and Communication Engineering, Kyushu University 九州大学大学院システム情報科学研究科
	Author PID K000217 Creator Name Yasuura, Hiroto 安浦, 寛人ヤスウラ, ヒロト Affiliation Affiliation Name Department of Computer Science and Communication Engineering, Kyushu University 九州大学大学院システム情報科学研究科
Language	English
Publisher	Association for Computing Machinery
Date	2002-10
Source Title	Proc. of IEEE/ACM International Symposium on System Synthesis (ISSS'02)
Source Title	SLRC Papers Database
First Page	32
Last Page	37
Publication Type	Accepted Manuscript
Access Rights	open access
Related DOI	Proc. of IEEE/ACM International Symposium on System Synthesis (ISSS'02) \|\| \|\| p32-37
Related DOI	http://www.c.csce.kyushu-u.ac.jp/SOC/index_j.html
Related URI	Proc. of IEEE/ACM International Symposium on System Synthesis (ISSS'02) \|\| \|\| p32-37
Related URI	http://www.c.csce.kyushu-u.ac.jp/SOC/index_j.html
Relation	Proc. of IEEE/ACM International Symposium on System Synthesis (ISSS'02) \|\| \|\| p32-37
Relation	http://www.c.csce.kyushu-u.ac.jp/SOC/index_j.html
Abstract	Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and redesign a system to re...ach near an optimal value. The resulting effect is a long design time. In this paper, we introduce an effective scheme that accelerates design. A system-level pruning of design exploration space speeds up the optimization process. Through a single-pass simulation for a reference customization and a model for estimating and evaluating the system’s performance, pruning of design space is achieved. Experimental results show that a substantial reduction in design time is possible.show more

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Record ID	5849
Peer-Reviewed	Unrefereed
Subject Terms	design of custom embedded systems
Subject Terms	pruning of design exploration space
NCID	BA63104365
Type	会議発表論文
Created Date	2009.04.22
Modified Date	2020.11.02