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半導体製造技術における微細化の進展により，ソフトエラーの増加が問題となっている．マルチコアプロセッサを利用しスレッドを冗長実行する方式では，消費電力が大幅に増大してしまう．一方，シングルプロセッサ内で命令を冗長実行する方式では，性能低下が深刻である．本稿では，マルチ・クラスタ型コア・プロセッサ（MCCP: Multiple Clustered Core Processor）と呼ばれるディペンダブル...なマルチコアプロセッサ上での，消費電力と性能とのトレードオフを考察する．高い電力効率と高性能とを両立させるために，スレッド冗長実行と命令冗長実行の組合せを提案する．シミュレーションにより，MCCP 上で提案方式を利用すると，スレッド冗長実行方式と比較して，エネルギー遅延積を13% 改善できることを確認している．
As deep submicron technologies are advanced, we face new challenges, such as power consumption and soft errors. A naive technique, which utilizes emerging multicore processors and relies upon thread-level redundancy to detect soft errors, is power hungry. Another technique, which relies upon instruction-level redundancy, seriously diminishes computing performance. This paper investigates a trade-off between power and performance of a dependable multicore processor, which is named multiple clustered core processor (MCCP). It is proposed to hybrid thread- and instruction-level redundancy in order to achieve both high power efficiency and small performance loss. Detailed simulations show that the MCCP exploiting the hybrid technique improves power efficiency in energy-delay product by 13% when it compares with the one exploiting the naive thread-level technique.show more
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