Digital computer arithmetic datapath design using verilog HDL

＜図書＞
Digital computer arithmetic datapath design using verilog HDL

責任表示	James E. Stine
データ種別	図書
出版情報	Boston : Kluwer Academic , c2004
本文言語	英語
大きさ	xi, 180 p. : ill. ; 25 cm. + 1 CD-ROM
概要	Verilog HDL is a Hardware Description Language used for simulating digital systems, including Very Large Scale Integration (VLSI) systems. This text describes the use of Verilog in creating designs us...d for design validation at the structural level. This is done largely through the presentation of Verilog datapath design implementations and accompanying theoretical explanation. The CD-ROM contains the computer files discussed in the text. Annotation ©2004 Book News, Inc., Portland, OR (booknews.com) 続きを見る

状態	巻次	所蔵場所	請求記号	刷年	文庫名称	資料番号	コメント	予約・取寄	複写申込	自動書庫
		理系図2F 開架	549.7/St 6	2004		025212004003242		予約・取寄			予約・取寄

一般注記	Includes bibliographical references (p. [171]-177) and index
著者標目	*Stine, James E., 1966-
件　名	LCSH:Digital electronics LCSH:Verilog (Computer hardware description language) LCSH:Computer arithmetic
分　類	LCC:TK7868.D5 DC22:621.39/5
書誌ID	1001253540
ISBN	1402077106
NCID	BA65835179
巻冊次	ISBN:1402077106
登録日	2009.09.18
更新日	2009.09.18