Mendeley出力
＜図書＞
Shared memory multiprocessing
| 責任表示 | edited by Norihisa Suzuki |
|---|---|
| データ種別 | 図書 |
| 出版情報 | Cambridge, Mass. : MIT Press , c1992 |
| 本文言語 | 英語 |
| 大きさ | x, 510 p. ; 24 cm |
| 概要 | Shared memory multiprocessors are becoming the dominant architecture for small-scale parallel computation. This book is the first to provide a coherent review of current research in shared memory mult...processing in the United States and Japan. It focuses particularly on scalable architectures that will be able to support hundreds of microprocessors as well as on efficient and economical ways of connecting these fast microprocessors. The twenty contributions are divided into sections covering the experience to date with multiprocessors, cache coherency, software systems, and examples of scalable shared memory multiprocessors. Norihisa Suzuki is Director of the IBM Tokyo Research Laboratory. He is the co-inventor of the snoop cache, which in the early 1980s helped make it possible to build affordable and reliable shared memory multiprocessors. 続きを見る |
所蔵情報
| 状態 | 巻次 | 所蔵場所 | 請求記号 | 刷年 | 文庫名称 | 資料番号 | コメント | 予約・取寄 | 複写申込 | 自動書庫 |
|---|---|---|---|---|---|---|---|---|---|---|
|
|
|
理系図 自動書庫 | 007.6/Su 96 | 1992 |
|
031212008502510 |
|
書誌詳細
| 一般注記 | Includes bibliographical references |
|---|---|
| 著者標目 | 鈴木, 則久(1946-) <スズキ, ノリヒサ> |
| 件 名 | LCSH:Multiprocessors LCSH:Memory management (Computer science) |
| 分 類 | NDC8:007.6 LCC:QA76.5 DC20:004/.35 |
| 書誌ID | 1001132059 |
| ISBN | 0262193221 |
| NCID | BA19124829 |
| 巻冊次 | ISBN:0262193221 |
| 登録日 | 2009.09.17 |
| 更新日 | 2009.09.17 |