VHDL modeling for digital design synthesis

＜図書＞
VHDL modeling for digital design synthesis

責任表示	by Yu-Chin Hsu ... [et al.]
データ種別	図書
出版情報	Boston : Kluwer Academic , c1995
本文言語	英語
大きさ	xvii, 356 p. : ill. ; 25 cm
概要	Intended for working professionals as well as students, this book introduces VHSIC Hardware Description Language (VHDL) and its use for synthesis. VHDL, a hardware description language which provides...a means of specifying a digital system over different levels of abstraction, supports behavior specifications during the early stages of design process and structural specifications during later implementation stages. The first six chapters introduce the features of VHDL. Topics include a brief history of VHDL and how it is used in the design world; basic structures in VHDL; types, operators, and expressions; sequential statements; concurrent statements; and subprograms and packages. The second section (Chapters 7 to 14) discusses modeling at various levels of abstraction, the concept of synthesis, and how to write efficient VHDL design descriptions. Annotation copyright by Book News, Inc., Portland, OR続きを見る

状態	巻次	所蔵場所	請求記号	刷年	文庫名称	資料番号	コメント	予約・取寄	複写申込	自動書庫
		筑紫図 1B 000-399	007.6/H 97	1995		068622195000784		予約・取寄			予約・取寄

一般注記	Bibliography: p. [323]-326 Includes index
著者標目	Hsu, Yu-Chin, 1958-
件　名	LCSH:Digital electronics -- Computer simulation 全ての件名で検索 LCSH:VHDL (Computer hardware description language) LCSH:Computer aided design
分　類	LCC:TK7868.D5 DC20:621.39/2
書誌ID	1000976473
ISBN	0792395972
NCID	BA2577726X
巻冊次	ISBN:0792395972
登録日	2009.09.16
更新日	2009.09.16