Mendeley出力
＜図書＞
Layout minimization of CMOS cells
| 責任表示 | by Robert L. Maziasz and John P. Hayes |
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| シリーズ | The Kluwer international series in engineering and computer science ; SECS 160 . VLSI, computer architecture and digital signal engineering |
| データ種別 | 図書 |
| 出版情報 | Boston : Kluwer Academic Publishers , c1992 |
| 本文言語 | 英語 |
| 大きさ | xii, 169 p. : ill. ; 25 cm |
| 概要 | Presents new and provable optimal solutions to a number of previously unsolved problems in minimizing the layout area of CMOS cells and cell arrays, an important aspect of integrated circuit design. S...ows how these problems can be solved using exact algorithms, suitable for incorporation into computer-aided design systems, instead of the approximation methods now generally used. Annotation copyrighted by Book News, Inc., Portland, OR続きを見る |
所蔵情報
| 状態 | 巻次 | 所蔵場所 | 請求記号 | 刷年 | 文庫名称 | 資料番号 | コメント | 予約・取寄 | 複写申込 | 自動書庫 |
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筑紫図 1D 450-599 | 549.1/Ma 99 | 1992 |
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068622195000225 |
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書誌詳細
| 一般注記 | Includes bibliographical references (p. 157-165) and index |
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| 著者標目 | *Maziasz, Robert L., 1952- Hayes, John P. (John Patrick), 1944- |
| 件 名 | LCSH:Metal oxide semiconductors, Complementary -- Design and construction -- Data processing
全ての件名で検索
LCSH:Computer-aided design |
| 分 類 | LCC:TK7871.99.M44 DC20:621.381/52 |
| 書誌ID | 1000946715 |
| ISBN | 0792391829 |
| NCID | BA19173529 |
| 巻冊次 | ISBN:0792391829 |
| 登録日 | 2009.09.16 |
| 更新日 | 2009.09.16 |