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| Abstract |
チップマルチプロセッサでは並列処理によって性能向上を実現可能である．しかしながら，プロセッサコアの処理速度に比べ主記憶へのアクセス速度は非常に遅い．また，コア間での資源共有が必要であり，主記憶アクセスがプロセッサ性能抑制の主要因となっている．したがって，プロセッサシステム全体の性能向上のためには，各コアにおける演算の並列化効率とメモリ性能の両方を向上させる必要がある．そこで本稿では，メモリ貸与法に...基づくSPM 型CMP 向けコア協調実行方式を提案する．演算，メモリ性能の向上のため，それぞれにバランスよくコア資源を分配することでトータルでの性能向上を目指す．姫野ベンチマークをCell プロセッサに実装して評価した結果，単純な並列処理に比べて最大で13 ％の性能向上を確認した．
This paper proposes performance balancing, that is core management technique focused on trade-off between calculation and memory performance．In CMPs, high-performance is achieved by exploiting TLP. However, resource sharing among the cores makes memory performance lower regardless of the already low performance compared with processor core’s one. Thus, we have to consider not only scalability, but also the performance assumed ideal memory sub-systems. Our proposed technique attempts to select effective approach, exploit scalability or improve memory performance. We also focus on a software-controllable on-chip memory. By borrowing local memory of some cores to others, we achieve memory performance improvement, and try to improve processor performance. Our experimental results show 13% speed up in the best case, compared with conventional parallel processing on Cell Broadband Engine.show more
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