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An Evaluation Method for Soft Error Tolerance of Sequential Circuits with Markov Model

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Abstract LSIのソフトエラーに対する耐性の低下が問題となっている.ソフトエラー耐性を考慮した論理回路の設計ではソフトエラー耐性評価手法が必要となるが,順序回路を対象とした評価手法は確立されていない.本稿では,マルコフモデルを用い順序回路のソフトエラー耐性を評価する手法を提案する.提案手法は,ソフトエラー発生後の状態遷移の振る舞いを解析し,エラーが外部出力に伝搬する確率を計算するものである.また,提案手法を...用いいくつかのベンチマーク回路のソフトエラー耐性の評価を行う.
A lowering of tolerance for the soft error of the LSI becomes the problem. Soft error tolerance evaluation method is necessary by the logic design that considered soft error tolerance, but the evaluation method for sequential circuits is not established. This paper proposes an evaluation method for soft error tolerance of sequential circuits. In our approach, we analyzes the behavior of the state transition after a soft error occurs, and calculates the probability that the error propagates to external outputs. In addition, we evaluate the soft error tolerance of some benchmark circuits with proposal method.
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Created Date 2009.12.26
Modified Date 2022.01.24

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